Intro

All CPUs follow the fetchdecodeexecute cycle. Fetching instructions, decoding them and storing them in registers, then executing them. They also write them to memory

Fecth -> Decode -> Execute -> Memory -> Write

Instruction Set

Every CPU has a set of instructions it understands, this is known as an Instruction Set Architecture (ISA).

Types

There are different types of ISA. For example, both Intel and AMD processors use x86 which is a Complex Instruction Set Computer architecture, aka cisc.

Whereas other processors like the ones commonly found in phones and other devices use arm instruction sets, which are Reduced Instruction Set Computer architecture, aka risc.

Composition

Processors are extremely complex, but fundamentally, every processor is made of the following units:

  • Memory Controller
  • Cache (L1 & L2)
  • Algorithmic Logic Unit alu: handles math and logic operations
  • Register file: stores data for quick access
  • LSUs: handle data transfer between the register file and other memory components
  • MMU
  • Control Unit: manages instruction flow and overseas operations within the processor
  • Clock

ALU

Handles various types of operations and is the main logic engine of the processor.

  • Arithmetic operations
  • Logical operations such as AND, NOT, OR, and XOR
  • Comparison operations (>, >=, <, <=) between binary numbers
  • Bit-wise operations, left and right shits (<< and >>)

It also provides other units with signal flags to provide context on the operations it’s doing. These include

  • Carry Flag CF
  • Zero Flag ZF
  • Sign Flag SF
  • Overflow Flag OF

Registers

These are memory units that reside inside the processor itself and provide high-speed access to data, this is faster than fetching from RAM or disk when needed.
The data they hold is what the processor is currently using, and it’s only held temporarily.

There are different register types, based on their purpose. Some are general purpose and hold data for the ALU, while others have special purposes like holding addresses of next instructions.

Vector registers allow processors to perform operations on multiple data elements at the same time.

Load Storage Unit (LSU)

Manages moving data between external memory (RAM) and the register file in the CPU, they can hold data temporarily and also include a Load Queue for incoming data and a Store Queue for data to write back into memory.

Control Unit

This houses the logic to control the processors functionality. It’s main objective is to fetch instructions from memory, decode them and store them, and execute them by passing them to the ALU.

Clock

This circuit keeps everything in sync by generating electrical pulses at fixed intervals, these pulses are then used to coordinate internal operations. The rate of the pulses is known as Clock Speed and is measured in Hertz since it’s a frequency.


References